1. Field of the Invention
The present invention relates to a process for fabricating a semiconductor device having a via hole. More particularly, the present invention is concerned with a process for fabricating a semiconductor device including a step of cleaning the via hole.
2. Prior Art
In accordance with an increasing demand for very large scale integrated-circuits (VLSI) having an even smaller size and exhibiting a higher speed, developments of wiring materials having a lower resistivity and interlayer dielectrics having a lower dielectric constant have been demanded. For meeting such demands, copper is studied as a substitute for an aluminum alloy which has conventionally been used as a wiring material, and various low dielectric-constant materials are studied as a substitute for silicon oxide which has conventionally been used as an interlayer dielectric.
Generally, copper is difficult to be dry etched. Therefore, as a process for forming a copper wiring, a so-called Damascene process is considered to be promising.
On the other hand, as a low dielectric-constant organic film, an organic insulating film, such as a polyaryl ether film, is considered to be promising.
An example of a copper multilayer wiring formed by the Damascene process is described below with reference to FIG. 2. As shown in FIG. 2, a lower-layer copper wiring 112 having a trench wiring structure is formed in an insulating film 111 which is formed on a substrate (not shown), and then, an interlayer dielectric 113 is formed on the insulating film 111 so as to cover the lower-layer copper wiring 112. Then, a via hole 115 is formed by the known process so as to reach both of a trench 114 for forming an upper-layer copper wiring in the interlayer dielectric 113 and the lower-layer copper wiring 112.
Subsequently, for achieving an excellent electrical connection between the upper-layer copper wiring to be formed and the above lower-layer copper wiring 112, an oxide film or the like which is formed on the surface of the lower-layer copper wiring 112 exposed though the bottom portion of the via hole 115 is removed by a cleaning process by means of an argon sputtering process. This argon sputtering process is conducted so that a 25 to 30 nm-thick film is sputtered, in terms of the thickness of a silicon oxide film.
Then, a barrier layer 116 is formed from, for example, tantalum nitride, on the inner surface of each of the above trench 114 and the via hole 115 by the sputtering process. In this instance, also on the interlayer dielectric 113, a barrier layer (not shown) is excessively formed. Further, a copper seed layer (not shown) is formed on the surface of the barrier layer 116, and then, both of the via hole 115 and the trench 114 are plugged with copper by an electroplating process. In this instance, also on the interlayer dielectric 113, copper is excessively deposited. Then, the excess copper and the excess barrier layer on the interlayer dielectric 113 are removed by a chemical mechanical polishing process, and copper is allowed to remain in the trench 114 and the via hole 115 through the barrier layer 116, thereby forming a plug 117 and an upper-layer copper wiring 118.
However, the cleaning process by means of the above-mentioned argon sputtering process is one that has been used for the conventional aluminum alloy wiring, and hence, in accordance with the advance of even finer wirings, it has become difficult to satisfactorily clean the bottom portion of the finer via hole by this cleaning process. In addition, in the case of the copper wiring, as shown in FIG. 3, the copper which is sputtered from the surface of the lower-layer copper wiring 112 exposed through the bottom portion of the via hole 115 is redeposited on the sidewall of the via hole 115, and a problem arises in that the resultant redeposited material 121 is diffused into the interlayer dielectric 113 to cause a leakage between the wirings.
Thus, in the copper wiring process, a hydrogen plasma process in which the oxide layer on the bottom portion of the via hole is removed utilizing a reduction reaction is a promising cleaning process. However, in this hydrogen plasma process, as shown in FIG. 4, when a part of the layer of the interlayer dielectric 113 is formed from organic insulating films 113a, 113b, the organic insulating films 113a, 113b are etched by a hydrogen plasma treatment, so that a problem occurs in that the sidewall portions of the via hole 115 and the trench 114 are receded. This problem is disclosed in xe2x80x9cProceedings of 1999 International Interconnect Technology Conference (1999), p. 198xe2x80x9d.
In this situation, the present inventors have made extensive and intensive studies with a view toward solving the above-mentioned problems accompanying the prior art, in connection with the process for fabricating a semiconductor device, which comprises forming a recess portion in an insulating film covering a wiring made of copper or a copper alloy so that the recess portion reaches the wiring. As a result, it has unexpectedly been found that the above-mentioned problems inevitably accompanying the conventional techniques can be solved by, after forming the recess portion, conducting a plasma treatment using a gas containing hydrogen gas and nitrogen gas in a state such that the wiring is exposed through the bottom portion of the recess portion, or conducting a plasma treatment using a gas containing hydrogen gas in a state such that the wiring is exposed through the bottom portion of the recess portion while cooling a substrate on which the wiring is formed. The present invention has been completed, based on the above novel finding.
Accordingly, it is an object of the present invention to provide a process for fabricating a semiconductor device, which is advantageous in that, even when the insulating film is formed from an organic insulating film, the compound of nitrogen and carbon dissociated from the resist or organic insulating material is deposited on and protects the sidewall of the recess portion, thus preventing the sidewall of the recess portion from being receded, and at the same time, the bottom portion of the recess portion can be cleaned well by a reduction effect by the hydrogen plasma treatment, thus making it possible to stably form a copper wiring having a low resistivity and high reliability.
It is another object of the present invention to provide a process for fabricating a semiconductor device, which is advantageous in that the activity of hydrogen radicals is lowered by conducting the plasma treatment at a low temperature, so that the etching effect of the hydrogen radicals on the sidewall of the recess portion can be remarkably suppressed, and therefore, the bottom portion of the recess portion can be cleaned well by a reduction effect by the hydrogen plasma treatment while preventing the sidewall of the recess portion from being receded, thus making it possible to stably form a copper wiring having a low resistivity and high reliability.